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1 data sheet acquired from harris semiconductor schs149f features buffered inputs and outputs typical propagation delay: 13ns at v cc = 5v, c l = 15pf, t a = 25 o c fanout (over temperature range) - standard outputs . . . . . . . . . . . . . . . 10 lsttl loads - bus driver outputs . . . . . . . . . . . . . 15 lsttl loads wide operating temperature range . . . -55 o c to 125 o c balanced propagation delay and transition times signi?ant power reduction compared to lsttl logic ics hc types - 2v to 6v operation - high noise immunity: n il = 30%, n ih = 30% of v cc at v cc = 5v hct types - 4.5v to 5.5v operation - direct lsttl input logic compatibility, v il = 0.8v (max), v ih = 2v (min) - cmos input compatibility, i l 1 a at v ol , v oh description the ?c147 and cd74hct147 are high speed silicon-gate cmos devices and are pin-compatible with low power schottky ttl (lsttl). the ?c147 and cd74hct147 9-input priority encoders accept data from nine active low inputs (l 1 to l 9 ) and provide binary representation on the four active low inputs ( y0 to y3). a priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line l 9 having the highest priority. these devices provide the 10-line to 4-line priority encoding function by use of the implied decimal ?ero? the ?ero is encoded when all nine data inputs are high, forcing all four outputs high. pinout cd54hc147 (cerdip) cd74hc147 (pdip, soic, sop, tssop) cd74hct147 (pdip, tssop) top view ordering information part number temp. range ( o c) package cd54hc147f3a -55 to 125 16 ld cerdip CD74HC147E -55 to 125 16 ld pdip cd74hc147m -55 to 125 16 ld soic cd74hc147mt -55 to 125 16 ld soic cd74hc147m96 -55 to 125 16 ld soic cd74hc147nsr -55 to 125 16 ld sop cd74hc147pw -55 to 125 16 ld tssop cd74hc147pwr -55 to 125 16 ld tssop cd74hc147pwt -55 to 125 16 ld tssop cd74hct147e -55 to 125 16 ld pdip note: when ordering, use the entire part number. the suf?es 96 and r denote tape and reel. the suf? t denotes a small-quantity reel of 250. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 i4 i5 i6 i7 i8 y2 gnd y1 v cc y3 i3 i2 i1 i9 y0 nc september 1997 - revised november 2003 caution: these devices are sensitive to electrostatic discharge. users should follow proper ic handling procedures. copyright 2003, texas instruments incorporated cd54hc147, cd74hc147, cd74hct147 high-speed cmos logic 10- to 4-line priority encoder [ /title (cd74 hc147 , cd74 hct14 7) /sub- ject (high speed cmos logic 10-to-4 line prior- ity encode r) /autho r () /key- words (high speed cmos logic 10-to-4 line prior- ity encode r, high speed cmos logic 10-to-4 line prior- ity
2 functional diagram truth table inputs outputs i1 i2 i3 i4 i5 i6 i7 i8 i9 y3 y2 y1 y0 hhhhhhhhhhhhh xxxxxxxxl lhhl xxxxxxxlhlhhh xxxxxxlhhhl l l xxxxxlhhhhl lh xxxxlhhhhhlhl xxx lhhhhhhlhh xx lhhhhhhhhl l x lhhhhhhhhhlh lhhhhhhhhhhhl h = high logic level, l = low logic level, x = don? care 9 7 y0 11 12 13 2 4 3 1 i 7 i 6 i 5 i 4 i 3 i 2 i 1 5 i 8 10 i 9 gnd = 8 v cc = 16 6 14 y1 y2 y3 cd54hc147, cd74hc147, cd74hct147
3 absolute maximum ratings thermal information dc supply voltage, v cc . . . . . . . . . . . . . . . . . . . . . . . . -0.5v to 7v dc input diode current, i ik for v i < -0.5v or v i > v cc + 0.5v . . . . . . . . . . . . . . . . . . . . . . 20ma dc output diode current, i ok for v o < -0.5v or v o > v cc + 0.5v . . . . . . . . . . . . . . . . . . . . 20ma dc output source or sink current per output pin, i o for v o > -0.5v or v o < v cc + 0.5v . . . . . . . . . . . . . . . . . . . . 25ma dc v cc or ground current, i cc or i gnd . . . . . . . . . . . . . . . . . . 50ma operating conditions temperature range (t a ) . . . . . . . . . . . . . . . . . . . . . -55 o c to 125 o c supply voltage range, v cc hc types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2v to 6v hct types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4.5v to 5.5v dc input or output voltage, v i , v o . . . . . . . . . . . . . . . . . 0v to v cc input rise and fall time 2v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000ns (max) 4.5v. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500ns (max) 6v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 400ns (max) package thermal impedance, ja (see note 1): e (pdip) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67 o c/w m (soic) package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73 o c/w ns (sop) package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 o c/w pw (tssop) package . . . . . . . . . . . . . . . . . . . . . . . . . 108 o c/w maximum junction temperature . . . . . . . . . . . . . . . . . . . . . . . 150 o c maximum storage temperature range . . . . . . . . . .-65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . . 300 o c (soic - lead tips only) caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not im plied. note: 1. the package thermal impedance is calculated in accordance with jesd 51-7. dc electrical speci?ations parameter symbol test conditions v cc (v) 25 o c -40 o c to 85 o c -55 o c to 125 o c units v i (v) i o (ma) min typ max min max min max hc types high level input voltage v ih - - 2 1.5 - - 1.5 - 1.5 - v 4.5 3.15 - - 3.15 - 3.15 - v 6 4.2 - - 4.2 - 4.2 - v low level input voltage v il - - 2 - - 0.5 - 0.5 - 0.5 v 4.5 - - 1.35 - 1.35 - 1.35 v 6 - - 1.8 - 1.8 - 1.8 v high level output voltage cmos loads v oh v ih or v il -0.02 2 1.9 - - 1.9 - 1.9 - v -0.02 4.5 4.4 - - 4.4 - 4.4 - v -0.02 6 5.9 - - 5.9 - 5.9 - v high level output voltage ttl loads - - --- - - - - v -4 4.5 3.98 - - 3.84 - 3.7 - v -5.2 6 5.48 - - 5.34 - 5.2 - v low level output voltage cmos loads v ol v ih or v il 0.02 2 - - 0.1 - 0.1 - 0.1 v 0.02 4.5 - - 0.1 - 0.1 - 0.1 v 0.02 6 - - 0.1 - 0.1 - 0.1 v low level output voltage ttl loads - - --- - - - - v 4 4.5 - - 0.26 - 0.33 - 0.4 v 5.2 6 - - 0.26 - 0.33 - 0.4 v input leakage current i i v cc or gnd -6-- 0.1 - 1- 1 a quiescent device current i cc v cc or gnd 0 6 - - 8 - 80 - 160 a cd54hc147, cd74hc147, cd74hct147
4 hct types high level input voltage v ih - - 4.5 to 5.5 2- - 2 - 2 - v low level input voltage v il - - 4.5 to 5.5 - - 0.8 - 0.8 - 0.8 v high level output voltage cmos loads v oh v ih or v il -0.02 4.5 4.4 - - 4.4 - 4.4 - v high level output voltage ttl loads -4 4.5 3.98 - - 3.84 - 3.7 - v low level output voltage cmos loads v ol v ih or v il 0.02 4.5 - - 0.1 - 0.1 - 0.1 v low level output voltage ttl loads 4 4.5 - - 0.26 - 0.33 - 0.4 v input leakage current i i v cc and gnd 0 5.5 - 0.1 - 1- 1 a quiescent device current i cc v cc or gnd 0 5.5 - - 8 - 80 - 160 a additional quiescent device current per input pin: 1 unit load ? i cc (note 2) v cc -2.1 - 4.5 to 5.5 - 100 360 - 450 - 490 a note: 2. for dual-supply systems theoretical worst case (v i = 2.4v, v cc = 5.5v) specification is 1.8ma. dc electrical speci?ations (continued) parameter symbol test conditions v cc (v) 25 o c -40 o c to 85 o c -55 o c to 125 o c units v i (v) i o (ma) min typ max min max min max hct input loading table input unit loads i 1 , i 2 , i 3 , i 6 , i 7 1.1 i 4 , i 5 , i 8 , i 9 1.5 note: unit load is ? i cc limit speci?d in dc electrical table, e.g., 360 a max at 25 o c. switching speci?ations input t r , t f = 6ns parameter symbol test conditions v cc (v) 25 o c -40 o c to 85 o c -55 o c to 125 o c units min typ max min max min max hc types propagation delay, input to output (figure 1) t plh, t phl c l = 50pf 2 - - 160 - 200 - 240 ns 4.5 - - 32 - 40 - 48 ns 5 - 13 - - - - - ns 6 - - 27 - 34 - 41 ns transition times (figure 1) t tlh , t thl c l = 50pf 2 - - 75 - 95 - 110 ns 4.5 - - 15 - 19 - 22 ns 6 - - 13 - 16 - 19 ns input capacitance c in - - - - 10 - 10 - 10 pf cd54hc147, cd74hc147, cd74hct147
5 power dissipation capaci- tance (notes 3, 4) c pd -5-32-----pf hct types propagation delay, input to output (figure 2) t plh , t phl c l = 50pf 4.5 - - 35 - 44 - 53 ns 5 - 14 - - - - - ns transition times (figure 2) t tlh , t thl c l = 50pf 4.5 - - 15 - 19 - 22 ns input capacitance c in - - - - 10 - 10 - 10 pf power dissipation capaci- tance (notes 3, 4) c pd -5-42-----pf notes: 3. c pd is used to determine the dynamic power consumption, per gate. 4. p d = v cc 2 f i (c pd + c l ) where f i = input frequency, c l = output load capacitance, v cc = supply voltage. switching speci?ations input t r , t f = 6ns (continued) parameter symbol test conditions v cc (v) 25 o c -40 o c to 85 o c -55 o c to 125 o c units min typ max min max min max test circuits and waveforms figure 6. hc and hcu transition times and propaga- tion delay times, combination logic figure 7. hct transition times and propagation delay times, combination logic t phl t plh t thl t tlh 90% 50% 10% 50% 10% inverting output input gnd v cc t r = 6ns t f = 6ns 90% t phl t plh t thl t tlh 2.7v 1.3v 0.3v 1.3v 10% inverting output input gnd 3v t r = 6ns t f = 6ns 90% cd54hc147, cd74hc147, cd74hct147
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) 8406401ea active cdip j 16 1 tbd a42 snpb n / a for pkg type cd54hc147f3a active cdip j 16 1 tbd a42 snpb n / a for pkg type CD74HC147E active pdip n 16 25 pb-free (rohs) cu nipdau n / a for pkg type CD74HC147Ee4 active pdip n 16 25 pb-free (rohs) cu nipdau n / a for pkg type cd74hc147m active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147m96 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147m96e4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147m96g4 active soic d 16 2500 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147me4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147mg4 active soic d 16 40 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147mt active soic d 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147mte4 active soic d 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147mtg4 active soic d 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147nsr active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147nsre4 active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147nsrg4 active so ns 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pw active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pwe4 active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pwg4 active tssop pw 16 90 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pwr active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pwre4 active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pwrg4 active tssop pw 16 2000 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pwt active tssop pw 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pwte4 active tssop pw 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hc147pwtg4 active tssop pw 16 250 green (rohs & no sb/br) cu nipdau level-1-260c-unlim cd74hct147e active pdip n 16 25 pb-free cu nipdau n / a for pkg type package option addendum www.ti.com 4-jun-2007 addendum-page 1
orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) (rohs) cd74hct147ee4 active pdip n 16 25 pb-free (rohs) cu nipdau n / a for pkg type (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 4-jun-2007 addendum-page 2
tape and reel information package materials information www.ti.com 9-jun-2007 pack materials-page 1
device package pins site reel diameter (mm) reel width (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant cd74hc147m96 d 16 fmx 330 16 6.5 10.3 2.1 8 16 q1 cd74hc147nsr ns 16 mla 330 16 8.2 10.5 2.5 12 16 q1 cd74hc147pwr pw 16 mla 330 12 7.0 5.6 1.6 8 12 q1 tape and reel box information device package pins site length (mm) width (mm) height (mm) cd74hc147m96 d 16 fmx 342.9 336.6 28.58 cd74hc147nsr ns 16 mla 342.9 336.6 28.58 cd74hc147pwr pw 16 mla 338.1 340.5 20.64 package materials information www.ti.com 9-jun-2007 pack materials-page 2
package materials information www.ti.com 9-jun-2007 pack materials-page 3

mechanical data mtss001c january 1995 revised february 1999 post office box 655303 ? dallas, texas 75265 pw (r-pdso-g**) plastic small-outline package 14 pins shown 0,65 m 0,10 0,10 0,25 0,50 0,75 0,15 nom gage plane 28 9,80 9,60 24 7,90 7,70 20 16 6,60 6,40 4040064/f 01/97 0,30 6,60 6,20 8 0,19 4,30 4,50 7 0,15 14 a 1 1,20 max 14 5,10 4,90 8 3,10 2,90 a max a min dim pins ** 0,05 4,90 5,10 seating plane 0 8 notes: a. all linear dimensions are in millimeters. b. this drawing is subject to change without notice. c. body dimensions do not include mold flash or protrusion not to exceed 0,15. d. falls within jedec mo-153
important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of ti information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. information of third parties may be subject to additional restrictions. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. ti products are not authorized for use in safety-critical applications (such as life support) where a failure of the ti product would reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing such use. buyers represent that they have all necessary expertise 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with all legal and regulatory requirements in connection with such use. ti products are neither designed nor intended for use in automotive applications or environments unless the specific ti products are designated by ti as compliant with iso/ts 16949 requirements. buyers acknowledge and agree that, if they use any non-designated products in automotive applications, ti will not be responsible for any failure to meet such requirements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security rfid www.ti-rfid.com telephony www.ti.com/telephony low power www.ti.com/lpw video & imaging www.ti.com/video wireless wireless www.ti.com/wireless mailing address: texas instruments, post office box 655303, dallas, texas 75265 copyright ? 2007, texas instruments incorporated

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